The present invention relates to a semiconductor integrated circuit device such as a non-volatile storage device composed of a circuit operating within the range of a low voltage and a circuit operating at high voltage, and more particularly, to a semiconductor integrated circuit having a single power source and a circuit operating at a voltage higher than the power source voltage.
Conventionally, a semiconductor integrated circuit device is constructed as shown in FIG. 2, wherein a block transistor 1 is provided between a Vcc line circuit 2 and a Vpp line circuit 3 so as to output a high potential by inputting a signal to the Vcc line circuit 2. The gate potential of the block transistor 1 connecting the Vcc line circuit 2 and the Vpp line circuit 3 is fixed at Vcc.
The block transistor 1 is normally composed of an NMOS transistor having a low threshold voltage (0V for example) so that the Vcc line circuit 2 can drive the Vpp line circuit 3 efficiently. The Vcc line circuit above refers, for example, to a circuit operating at the power supply voltage or less. The Vpp line circuit refers to a circuit operating at a voltage higher than the power supply voltage and generally to a circuit or system operating at a voltage which is at least twice that of the power supply voltage, generated in a step-up circuit within an integrated circuit. However, the prior art circuit has a problem in that a current leaks from the Vpp line circuit 3 to the Vcc line circuit 2, especially when Vcc decreases driving circuit operation.
Accordingly, it is an object of the present invention to provide a semiconductor integrated circuit device which is capable of suppressing leakage from the Vpp line to the Vcc line and to also provide a semiconductor integrated circuit device which operates at a power voltage lower than 2V, as a consequence of reducing the leak current from the Vpp line to the Vcc line.